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GHC 10.0.0.20260917 · lts/ghc-10.0.x · fc4e598 · 2026-10-11

Moduleghc-10.0.0.20260917GHC2024

GHC.CmmToAsm.LA64.Instr

  • 4 types
  • 105 values
valuestackAlign :: Int
#

The number of bytes that the stack pointer should be aligned to.

Get the registers that are being used by this instruction. regUsage doesn't need to do any trickery for jumps and such. Just state precisely the regs read and written by that insn. The consequences of control flow transfers, as far as register allocation goes, are taken care of by the register allocator.

RegUsage = RU [regs] [regs]

valuecallerSavedRegisters :: [Reg]
#

Caller-saved registers (according to calling convention)

0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 |

zero| ra | tp | sp | a0 | a1 | a2 | a3 | a4 | a5 | a6 | a7 | t0 | t1 | t2 | t3 | t4 | t5 | t6 | t7 | t8 | Rv | fp | s0 | s1 | s2 | s3 | s4 | s5 | s6 | s7 | s8 |

32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 42 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 |

valueisJumpishInstr :: Instr -> Bool
#

Checks whether this instruction is a jump/branch instruction. One that can change the flow of control in a way that the register allocator needs to worry about.

valuepatchJumpInstr :: Instr -> (BlockId -> BlockId) -> Instr
#

Change the destination of this (potential) jump instruction. Used in the linear allocator when adding fixup blocks for join points.

Take the source and destination from this (potential) reg -> reg move instruction We have to be a bit careful here: A MOV can also mean an implicit conversion. This case is filtered out.

datadata Instr
#

Constructors

Instances1Instruction

Orphan instances

1 instance