GHC.CmmToAsm.AArch64.Instr

LR and FP (8 byte each) are the prologue of each stack frame

All non-vector registers are 8 byte wide.

128-bit vector registers use two slots; see GHC.CmmToAsm.Reg.Linear.StackMap.getStackSlotFor.

The number of bytes that the stack pointer should be aligned to.

The number of spill slots available without allocating more.

Convert a spill slot number to a *byte* offset, with no sign.

0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 42 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | |== General Purpose registers ==================================================================================================================================| | argument passing ------------- | IR | tmp registers -------- | IP0| IP1| PL | callee saved ------------ | FP | LR | SP | | free registers -------------------------------------------------------------------- | BR | Sp | Hp | R1 | R2 | R3 | R4 | R5 | R6 | SL | -- | -- | -- | |== SIMD/FP Registers ==========================================================================================================================================| | argument passing ------------- | callee saved (lower 64 bits) --- | caller saved ---------------------- | | free registers |XMM1|XMM2|------- | F1 | F2 | F3 | F4 | D1 | D2 | D3 | D4 | free registers ----------------------------------------------------- | --------------------------------------------------------------------------------------------------------------------------------------------------------------- IR: Indirect result location register, IP: Intra-procedure register, PL: Platform register (See Note [Aarch64 Register x18 at Darwin and Windows]), FP: Frame pointer, LR: Link register, SP: Stack pointer BR: Base, SL: SpLim

TODO: The zero register is currently mapped to -1 but should get it's own separate number.

Apply a given mapping to all the register references in this instruction.

Checks whether this instruction is a jump/branch instruction. One that can change the flow of control in a way that the register allocator needs to worry about.

Checks whether this instruction is a jump/branch instruction. One that can change the flow of control in a way that the register allocator needs to worry about.

Change the destination of this jump instruction. Used in the linear allocator when adding fixup blocks for join points.

An instruction to spill a register into a spill slot.

See if this instruction is telling us the current C stack delta

Copy the value in a register to another one. Must work for all register classes.

Take the source and destination registers from a move instruction of same register class (RegClass).

The idea is to identify moves that can be eliminated by the register allocator: If the source register serves no special purpose, one could continue using it; saving one move instruction. For this, the register kinds (classes) must be the same (no conversion involved.)

Make an unconditional jump instruction.